ST STM32F301 6 Series Reference Manual page 81

RM0366
In addition, the power consumption in Run mode can be reduce by one of the following
means:
•
Slowing down the system clocks
•
Gating the clocks to the APB and AHB peripherals when they are unused.
Mode name
Sleep
(Sleep now or
Sleep-on -
exit)
Stop
Standby
Caution: In STM32F318x8 devices with regulator off, Standby mode is not available. Stop mode is
still available but it is meaningless to distinguish between voltage regulator in low-power
mode and voltage regulator in Run mode because the regulator is not used and V
applied externally to the regulator output.
6.3.1 Slowing down system clocks
In Run mode the speed of the system clocks (SYSCLK, HCLK, PCLK) can be reduced by
programming the prescaler registers. These prescalers can also be used to slow down
peripherals before entering Sleep mode.
For more details, refer to
6.3.2 Peripheral clock gating
In Run mode, the HCLK, and PCLK for individual peripherals and memories can be stopped
at any time to reduce power consumption.
To further reduce power consumption in Sleep mode the peripheral clocks can be disabled
prior to executing the WFI or WFE instructions.
Peripheral clock gating is controlled by the AHB peripheral clock enable register
(RCC_AHBENR), APB1 peripheral clock enable register (RCC_APB1ENR) and APB2
peripheral clock enable register (RCC_APB2ENR).
Table 13. Low-power mode summary
Entry wakeup
WFI Any interrupt
WFE Wakeup event
Any EXTI line
(configured in the
EXTI registers)
PDDS and LPDS
bits +
Specific
SLEEPDEEP bit
communication
+ WFI or WFE
peripherals on
reception events
(USART, I2C)
WKUP pin rising
PDDS bit + edge, RTC alarm,
SLEEPDEEP bit external reset in
+ WFI or WFE NRST pin,
IWDG reset
Section 7.4.2: Clock configuration register
RM0366 Rev 5
Power control (PWR)
Effect on
Effect on 1.8V V
domain clocks domain
clocks
CPU clock OFF
no effect on other
None
clocks or analog
clock sources
HSI and
All 1.8V domain HSE
clocks OFF oscillators
OFF
(RCC_CFGR).
Voltage
DD
regulator
ON
ON or in low-
power mode
(depends on
Power control
register
(PWR_CR))
OFF
is
DD
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