ST STM32F301 6 Series Reference Manual page 317

RM0366
16.3.3 Reset and clocks
The TSC clock source is the AHB clock (HCLK). Two programmable prescalers are used to
generate the pulse generator and the spread spectrum internal clocks:
•
The pulse generator clock (PGCLK) is defined using the PGPSC[2:0] bits of the
TSC_CR register
•
The spread spectrum clock (SSCLK) is defined using the SSPSC bit of the TSC_CR
register
The reset and clock controller (RCC) provides dedicated bits to enable the touch sensing
controller clock and to reset this peripheral. For more information, refer to
and clock control
16.3.4 Charge transfer acquisition sequence
An example of a charge transfer acquisition sequence is detailed in
CLK_AHB
1
C
HiZ
X
0
1
C
HiZ
S
0
State
For higher flexibility, the charge transfer frequency is fully configurable. Both the pulse high
state (charge of C
be defined using the CTPH[3:0] and CTPL[3:0] bits in the TSC_CR register. The standard
range for the pulse high and low states duration is 500 ns to 2 µs. To ensure a correct
measurement of the electrode capacitance, the pulse high state duration must be set to
ensure that C
A dead time where both the sampling capacitor I/O and the channel I/O are in input floating
state is inserted between the pulse high and low states to ensure an optimum charge
transfer acquisition sequence. This state duration is 2 periods of HCLK.
At the end of the pulse high state and if the spread spectrum feature is enabled, a variable
number of periods of the SSCLK clock are added.
(RCC).
Figure 90. Charge transfer acquisition sequence
Charge transfer frequency
Pulse high
Discharge
state
C and C
X S
(charge of C )
X
) and the pulse low state (transfer of charge from C
X
is always fully charged.
X
Pulse low
state (charge Pulse high
transfer from state
C to C )
X S
RM0366 Rev 5
Touch sensing controller (TSC)
Section 7: Reset
Figure 90.
Pulse low
state
to C ) duration can
X S
t
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