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RM0366
12.5.13
ADC regular sequence register 4 (ADCx_SQR4, x=1)
Address offset: 0x3C
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:11 Reserved, must be kept at reset value.
Bits 10:6 SQ16[4:0]: 16th conversion in regular sequence
These bits are written by software with the channel number (1..18) assigned as the 16th in the
regular conversion sequence.
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
Note: Analog input channel 0 is not mapped: value "00000" should not be used
Bit 5 Reserved, must be kept at reset value.
Bits 4:0 SQ15[4:0]: 15th conversion in regular sequence
These bits are written by software with the channel number (1..18) assigned as the 15th in the
regular conversion sequence.
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
Note: Analog input channel 0 is not mapped: value "00000" should not be used
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
rw
rw
regular conversion is ongoing).
regular conversion is ongoing).
24
23
22
Res.
Res.
Res.
8
7
6
SQ16[4:0]
rw
rw
rw
RM0366 Rev 5
Analog-to-digital converters (ADC)
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
Res.
SQ15[4:0]
rw
rw
rw
17
16
Res.
Res.
1
0
rw
rw
263/874
277
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