ST STM32F301 6 Series Reference Manual page 174

Direct memory access controller (DMA)
Offset Register name
DMA_CNDTR6
0x070
Reset value
DMA_CPAR6
0x074
Reset value
DMA_CMAR6
0x078
Reset value
0x07C Reserved
DMA_CCR7
0x080
Reset value
DMA_CNDTR7
0x084
Reset value
DMA_CPAR7
0x088
Reset value
DMA_CMAR7
0x08C
Reset value
Refer to
174/874
Table 27. DMA register map and reset values (continued)
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Section 2.2 for the register boundary addresses.
0
PA[31:0]
0 0 0 0 0 0 0 0 0
MA[31:0]
0 0 0 0 0 0 0 0 0
Reserved.
0
PA[31:0]
0 0 0 0 0 0 0 0 0
MA[31:0]
0 0 0 0 0 0 0 0 0
RM0366 Rev 5
NDTR[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
NDTR[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
RM0366
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0