ST STM32F301 6 Series Reference Manual page 630

Real-time clock (RTC)
24.6.5 RTC prescaler register (RTC_PRER)
This register must be written in initialization mode only. The initialization must be performed
in two separate write accesses. Refer to
page 611.
This register is write protected. The write access procedure is described in
write protection on page
Address offset: 0x10
Backup domain reset value: 0x007F 00FF
System reset: not affected
31 30 29
Res. Res. Res. Res.
15 14 13
Res.
rw rw
Bits 31:23 Reserved, must be kept at reset value.
Bits 22:16 PREDIV_A[6:0]: Asynchronous prescaler factor
This is the asynchronous division factor:
ck_apre frequency = RTCCLK frequency/(PREDIV_A+1)
Bit 15 Reserved, must be kept at reset value.
Bits 14:0 PREDIV_S[14:0]: Synchronous prescaler factor
This is the synchronous division factor:
ck_spre frequency = ck_apre frequency/(PREDIV_S+1)
630/874
611.
28 27 26 25
Res. Res. Res.
12 11 10 9
rw rw rw rw
Calendar initialization and configuration on
24 23 22
Res. Res.
rw
8 7 6
PREDIV_S[14:0]
rw rw rw
RM0366 Rev 5
RTC register
21 20 19 18
PREDIV_A[6:0]
rw rw rw rw
5 4 3 2
rw rw rw rw
RM0366
17 16
rw rw
1 0
rw rw