ST STM32F301 6 Series Reference Manual page 44

2.3 Embedded SRAM
STM32F3xx devices feature up to 16 Kbytes of static SRAM. It can be accessed as bytes,
halfwords (16 bits) or full words (32 bits). Up to 16 Kbytes of SRAM can be addressed at
maximum system clock frequency without wait state, and can be accessed by both CPU
and DMA.
2.4 Flash memory overview
The Flash memory is composed of two distinct physical areas:
•
The main Flash memory block. It contains the application program and user data if
necessary.
•
The information block. It is composed of two parts:
–
–
Flash memory instructions and data access are performed through the AHB bus. The
prefetch block is used for instruction fetches through the ICode bus. Arbitration is performed
in the Flash memory interface, and priority is given to data access on the DCode bus. It also
implements the logic necessary to carry out the Flash memory operations (Program/Erase)
controlled through the Flash registers.
2.5 Boot configuration
In the STM32F3xx, three different boot modes can be selected through the BOOT0 pin and
nBOOT1 bit in the User option byte, as shown in the following table:
Boot mode selection
nBOOT1
x
1
0
The values on both BOOT0 pin and nBOOT1 bit are latched on the 4th rising edge of
SYSCLK after a reset.
It is up to the user to set the nBOOT1 and BOOT0 to select the required boot mode. The
BOOT0 pin and nBOOT1 bit are also resampled when exiting from Standby mode.
Consequently they must be kept in the required Boot mode configuration in Standby mode.
After this startup delay has elapsed, the CPU fetches the top-of-stack value from address
0x0000 0000, then starts code execution from the boot memory at 0x0000 0004. Depending
44/874
Option bytes for hardware and memory protection user configuration.
System memory which contains the proprietary boot loader code. Please, refer to
Section 3: Embedded flash memory
BOOT0
0
1
1
for more details.
Table 2. Boot modes
Boot mode
-
Main flash memory is selected as boot
Main Flash memory
area
System memory System memory is selected as boot area
Embedded SRAM (on the DCode bus) is
Embedded SRAM
selected as boot area
RM0366 Rev 5
RM0366
Aliasing
-