ST STM32F301 6 Series Reference Manual page 441

RM0366
Figure 169. Control circuit in normal mode, internal clock divided by 1
CEN=CNT_EN
Counter clock = CK_CNT = CK_PSC
Counter register
External clock source mode 1
This mode is selected when SMS=111 in the TIMx_SMCR register. The counter can count at
each rising or falling edge on a selected input.
TI2
Filter
ICF[3:0]
TIMx_CCMR1
For example, to configure the upcounter to count in response to a rising edge on the TI2
input, use the following procedure:
Internal clock
UG
CNT_INIT
31
Figure 170. TI2 external clock connection example
TI2F_Rising
Edge
detector
TI2F_Falling
TIMx_CCER
3 2 33 34 35 36
TIMx_SMCR
TS[2:0]
or
ITRx
0xx
TI1_ED
100
TI1FP1
101
0
TI2FP2
110
ETRF
1
111
CC2P
RM0366 Rev 5
General-purpose timer (TIM2)
00 01 02 03 04 05
TI2F or
TI1F or
Encoder
mode
TRGI External clock
mode 1
External clock
ETRF
mode 2
CK_INT
Internal clock
mode
(internal clock)
ECE SMS[2:0]
TIMx_SMCR
06 07
MS31085V2
CK_PSC
MS31196V1
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