ST STM32F301 6 Series Reference Manual page 339

RM0366 Advanced-control timer (TIM1)
Figure 97. Counter timing diagram, internal clock divided by 4
CK_PSC
CNT_EN
Timerclock = CK_CNT
Counter register
0035
0036 0000 0001
Counter overflow
Update event (UEV)
Update interrupt flag
(UIF)
MS31080V2
Figure 98. Counter timing diagram, internal clock divided by N
CK_PSC
Timerclock = CK_CNT
1F 00
Counter register 20
Counter overflow
Update event (UEV)
Update interrupt flag
(UIF)
MS31081V2
RM0366 Rev 5 339/874
425