ST STM32F301 6 Series Reference Manual page 696

Inter-integrated circuit interface (I2C)
25.5 I2C in low-power modes
Mode
Sleep
(1)
Stop
Standby The I2C peripheral is powered down. It must be reinitialized after exiting Standby mode.
1. Refer to
instance. If the wake-up from a specific stop mode is not supported, the instance must be disabled before
entering that specific Stop mode.
25.6 I2C interrupts
The following table gives the list of I2C interrupt requests.
Interrupt Interrupt
acronym event
Receive buffer not
empty
Transmit buffer
interrupt status
STOP detection
interrupt flag
Transfer complete
reload
I2C_EV
Transfer complete
Address matched
NACK reception
Bus error
I2C_ERR Arbitration loss
Overrun/underrun
PEC error
Timeout/
I2C_ERR
t error
LOW
SMBus alert
1. The ADDR match event can wake up the device from Stop mode only if the I2C instance supports the wake-up from Stop
mode feature. Refer to
696/874
Table 96. Effect of low-power modes to I2C
No effect. I2C interrupts cause the device to exit the Sleep mode.
The contents of I2C registers are kept.
– WUPEN = 1 and I2C is clocked by an internal oscillator (HSI). The address recognition
is functional. The I2C address match condition causes the device to exit the Stop mode.
– WUPEN = 0: the I2C must be disabled before entering Stop mode.
Section 25.3: I2C implementation
Table 97. I2C interrupt requests
Event flag
control bit
RXNE
TXIS
STOPF
TCR
TC
ADDR ADDRIE
NACKF
BERR
ARLO
OVR
PECERR
TIMEOUT
ALERT
Section 25.3: I2C implementation.
Description
for information about the Stop modes supported by each
Enable Interrupt clear
method
Read I2C_RXDR
RXIE
register
Write I2C_TXDR
TXIE
register
STOPIE Write STOPCF = 1
Write I2C_CR2 with
NBYTES[7:0] ≠ 0
TCIE
Write START = 1 or
STOP = 1
Write ADDRCF = 1
NACKIE Write NACKCF = 1
Write BERRCF = 1
ERRIE Write ARLOCF = 1
Write OVRCF = 1
Write PECERRCF = 1
Write
ERRIE
TIMEOUTCF = 1
Write ALERTCF = 1
RM0366 Rev 5
RM0366
Exit Exit Exit
Sleep Stop Standby
mode modes modes
No
Yes No
(1)
Yes
No
Yes No No
Yes No No