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ST STM32F301 6 Series Reference Manual page 145

Advanced arm-based 32-bit mcus

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RM0366
Bits 31:26 FPU_IE[5..0]: Floating Point Unit interrupts enable bits
FPU_IE[5]: Inexact interrupt enable
FPU_IE[4]: Input normal interrupt enable
FPU_IE[3]: Overflow interrupt enable
FPU_IE[2]: underflow interrupt enable
FPU_IE[1]: Divide-by-zero interrupt enable
FPU_IE[0]: Invalid operation interrupt enable
Bit 25 Reserved, must be kept at reset value.
Bit 24 I2C3_FMP: I2C3 fast mode Plus driving capability activation
1: Fm+ mode is enabled on I2C3 pins selected through AF selection bits.
Bits 23:22 ENCODER_MODE: Encoder mode
This bit is set and cleared by software.
Bit 21 I2C2_FMP: I2C2 fast mode Plus driving capability activation
This bit is set and cleared by software. It enables the Fm+ on I2C2 pins selected through AF
selection bits.
Bit 20 I2C1_FMP: I2C1 Fm+ driving capability activation
This bit is set and cleared by software. It enables the Fm+ on I2C1 pins selected through AF
selection bits.
Bits 19:16 I2C_PBx_FMP: Fm+ driving capability activation on the pad
These bits are set and cleared by software. Each bit enables I
PB8, and PB9 I/Os.
Bits 15:14 Reserved, must be kept at reset value.
Bit 13 TIM6_DAC1_CH1_DMA_RMP: TIM6 and DAC channel1 DMA remap
This bit must to be set by software in order to remap TIM6_UP and DAC_CH1 DMA requests
on DMA1 channel 3.This bit is set and cleared by software. It controls the remapping of TIM6
(UP) and DAC channel1 DMA request.
Bit 12 TIM17_DMA_RMP: TIM17 DMA request remapping bit
This bit is set and cleared by software. It controls the remapping of TIM17 DMA request.
This bit is set and cleared by software. It enables the Fm+ on I2C3 pins selected through AF
selection bits.
0: Fm+ mode is not enabled on I2C3 pins selected through AF selection bits
00: No redirection.
01: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively.
10: Reserved
11: Reserved.
0: Fm+ mode is not enabled on I2C2 pins selected through AF selection bits
1: Fm+ mode is enabled on I2C2 pins selected through AF selection bits.
0: Fm+ mode is not enabled on I2C1 pins selected through AF selection bits
1: Fm+ mode is enabled on I2C1 pins selected through AF selection bits.
0: PBx pin operates in standard mode (Sm), x = 6..9
2
1: I
C Fm+ mode enabled on PBx pin, and the Speed control is bypassed.
0: No remap (TIM6_UP and DAC_CH1 DMA requests mapped on DMA2 channel 3)
1: Remap (TIM6_UP and DAC_CH1 DMA requests mapped on DMA1 channel 3)
0: No remap (TIM17_CH1 and TIM17_UP DMA requests mapped on DMA1 channel 1)
1: Remap (TIM17_CH1 and TIM17_UP DMA requests mapped on DMA1 channel 7)
System configuration controller (SYSCFG)
RM0366 Rev 5
2
C Fm+ mode for PB6, PB7,
145/874
151

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