ST STM32F301 6 Series Reference Manual page 56

Embedded flash memory
Level 2: No debug
In this level, the protection level 1 is ensured. In addition, the Cortex
are disabled. Consequently, the debug port, the boot from RAM (boot RAM mode) and the
boot from the system memory (bootloader mode) are no more available. In user execution
mode, all operations are allowed on the Main flash memory. On the contrary, only read and
program operations can be performed on the option bytes.
Option bytes cannot be erased. Moreover, the RDP bytes cannot be programmed. Thus, the
level 2 cannot be removed at all: it is an irreversible operation. When attempting to program
the RDP byte, the protection error flag WRPRTERR is set in the FLASH_SR register, and an
interrupt can be generated.
Note: The debug feature is also disabled under reset.
STMicroelectronics is not able to perform analysis on defective parts on which the level 2
protection has been set.
Table 5. Access status versus protection level and execution modes
Protection
Area
level
1
Main Flash
memory
2
1
System
(2)
memory
2
1
Option bytes
2
1
Backup
registers
2
1. When the protection level 2 is active, the debug port, the boot from RAM and the boot from system memory
are disabled.
2. The system memory is only read-accessible, whatever the protection level (0, 1 or 2) and execution mode.
3. The main flash memory is erased when the RDP option byte is programmed with all level protections disabled
(0xAA).
4. All option bytes can be programmed, except the RDP byte.
5. The backup registers are erased only when RDP changes from level 1 to level 0.
Changing read protection level
It is easy to move from level 0 to level 1 by changing the value of the RDP byte to any value
(except 0xCC). By programming the 0xCC value in the RDP byte, it is possible to go to
level 2 either directly from level 0 or from level 1. On the contrary, the change to level 0 (no
protection) is not possible without a main flash memory Mass Erase operation. This Mass
Erase is generated as soon as 0xAA is programmed in the RDP byte.
Note: When the Mass Erase command is used, the backup registers (RTC_BKPxR in the RTC)
are also reset.
To validate the protection level change, the option bytes must be reloaded through the
OBL_LAUNCH bit in Flash control register.
56/874
User execution
Read Write
Yes Yes
Yes Yes
Yes No
Yes No
(3)
Yes Yes
(4)
Yes Yes
Yes Yes
Yes Yes
RM0366 Rev 5
Debug ootFromRam/ BootFromLoader
Erase Read
Yes No
(1)
Yes N/A
No Yes
(1)
No NA
Yes Yes
(1)
No N/A
N/A No
(1)
N/A N/A
RM0366
®
-M4 debug capabilities
Write Erase
(3)
No No
(1) (1)
N/A N/A
No No
(1) (1)
N/A N/A
(3)
Yes Yes
(1) (1)
N/A N/A
(5)
No No
(1) (1)
N/A N/A