Download Print this page

ST STM32F301 6 Series Reference Manual page 756

Advanced arm-based 32-bit mcus

Advertisement

Universal synchronous/asynchronous receiver transmitter (USART/UART)
26.8
USART registers
Refer to
The peripheral registers have to be accessed by words (32 bits).
26.8.1
USART control register 1 (USART_CR1)
Address offset: 0x00
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
15
14
13
OVER8
CMIE
MME
rw
rw
rw
Bits 31:29 Reserved, must be kept at reset value.
Bit 28 M1: Word length
This bit, with bit 12 (M0), determines the word length. It is set or cleared by software.
M[1:0] = 00: 1 Start bit, 8 data bits, n stop bits
M[1:0] = 01: 1 Start bit, 9 data bits, n stop bits
M[1:0] = 10: 1 Start bit, 7 data bits, n stop bits
This bit can only be written when the USART is disabled (UE=0).
Note: Not all modes are supported In 7-bit data length mode. Refer to
Bit 27 EOBIE: End of Block interrupt enable
This bit is set and cleared by software.
0: Interrupt is inhibited
1: A USART interrupt is generated when the EOBF flag is set in the USART_ISR register.
Note: If the USART does not support smartcard mode, this bit is reserved and must be kept
Bit 26 RTOIE: Receiver timeout interrupt enable
This bit is set and cleared by software.
0: Interrupt is inhibited
1: An USART interrupt is generated when the RTOF bit is set in the USART_ISR register.
Note: If the USART does not support the Receiver timeout feature, this bit is reserved and
Bits 25:21 DEAT[4:0]: Driver Enable assertion time
This 5-bit value defines the time between the activation of the DE (Driver Enable) signal and
the beginning of the start bit. It is expressed in sample time units (1/8 or 1/16 bit duration,
depending on the oversampling rate).
This bit field can only be written when the USART is disabled (UE=0).
Note: If the Driver Enable feature is not supported, this bit is reserved and must be kept at
756/874
Section 1.2 on page 36
28
27
26
25
M1
EOBIE
RTOIE
rw
rw
rw
rw
12
11
10
9
M0
WAKE
PCE
PS
rw
rw
rw
rw
implementation
for details.
at reset value. Please refer to
must be kept at reset value.
reset value. Please refer to
for a list of abbreviations used in register descriptions.
24
23
22
DEAT[4:0]
rw
rw
rw
8
7
6
PEIE
TXEIE
TCIE
RXNEIE IDLEIE
rw
rw
rw
Section 26.4: USART implementation on page
Section 26.4: USART implementation on page
Section 26.4: USART implementation on page
RM0366 Rev 5
21
20
19
18
DEDT[4:0]
rw
rw
rw
rw
5
4
3
2
TE
RE
rw
rw
rw
rw
Section 26.4: USART
RM0366
17
16
rw
rw
1
0
UESM
UE
rw
rw
714.
714.
714.

Advertisement

loading
Need help?

Need help?

Do you have a question about the STM32F301 6 Series and is the answer not in the manual?

This manual is also suitable for:

Stm32f301 8 seriesStm32f318 8 series