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ST STM32F301 6 Series Reference Manual page 631

Advanced arm-based 32-bit mcus

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RM0366
24.6.6
RTC wake-up timer register (RTC_WUTR)
This register can be written only when WUTWF is set to 1 in RTC_ISR.
This register is write protected. The write access procedure is described in
write protection on page
Address offset: 0x14
Backup domain reset value: 0x0000 FFFF
System reset: not affected
31
30
29
Res.
Res.
Res.
Res.
15
14
13
rw
rw
rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 WUT[15:0]: Wake-up auto-reload value bits
611.
28
27
26
25
Res.
Res.
Res.
12
11
10
9
rw
rw
rw
rw
When the wake-up timer is enabled (WUTE set to 1), the WUTF flag is set every (WUT[15:0]
+ 1) ck_wut cycles. The ck_wut period is selected through WUCKSEL[2:0] bits of the
RTC_CR register
When WUCKSEL[2] = 1, the wake-up timer becomes 17-bits and WUCKSEL[1] effectively
becomes WUT[16] the most-significant bit to be reloaded into the timer.
The first assertion of WUTF occurs (WUT+1) ck_wut cycles after WUTE is set. Setting
WUT[15:0] to 0x0000 with WUCKSEL[2:0] =011 (RTCCLK/2) is forbidden.
24
23
22
Res.
Res.
Res.
8
7
6
WUT[15:0]
rw
rw
rw
RM0366 Rev 5
Real-time clock (RTC)
RTC register
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
rw
rw
rw
rw
17
16
Res.
Res.
1
0
rw
rw
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