ST STM32F301 6 Series Reference Manual page 693

RM0366
Example SMBus controller receiver 2 bytes + PEC, automatic end mode (STOP)
NBYTES
INIT: program target address, program NBYTES = 3, AUTOEND=1, set PECBYTE, set START
EV1: RXNE ISR: rd data1
EV2: RXNE ISR: rd data2
EV3: RXNE ISR: rd PEC
Example SMBus controller receiver 2 bytes + PEC, software end mode (RESTART)
INIT
NBYTES
xx
INIT: program target address, program NBYTES = 3, AUTOEND = 0, set PECBYTE, set START
EV1: RXNE ISR: rd data1
EV2: RXNE ISR: rd data2
EV3: RXNE ISR: read PEC
EV4: TC ISR: program target address, program NBYTES = N, set START
25.4.16 Wake-up from Stop mode on address match
The I2C peripheral is able to wake up the device from Stop mode (APB clock is off), when
the device is addressed. All addressing modes are supported.
The wake-up from Stop mode is enabled by setting the WUPEN bit of the I2C_CR1 register.
The HSI oscillator must be selected as the clock source for I2CCLK to allow the wake-up
from Stop mode.
In Stop mode, the HSI oscillator is stopped. Upon detecting START condition, the I2C
interface starts the HSI oscillator and stretches SCL low until the oscillator wakes up.
HSI is then used for the address reception.
Figure 275. Bus transfer diagrams for SMBus controller receiver
data1
S Address A
INIT
xx 3
RXNE
data1
S Address A A
EV1
3
Inter-integrated circuit interface (I2C)
RXNE RXNE
PEC
data2
A A
E V 1 EV2
RXNE RXNE
data2 PEC
A NA
EV2 EV3
RM0366 Rev 5
RXNE
legend:
NA P
E V 3
legend:
TC
Restart Address
EV4
N
transmission
reception
SCL stretch
transmission
reception
SCL stretch
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