ST STM32F301 6 Series Reference Manual page 271

RM0366
12.6 ADC common registers
These registers define the control and status registers common to master and slave ADCs:
•
One set of registers is related to ADC1 (master)
12.6.1 ADC Common status register (ADCx_CSR, x=1)
Address offset: 0x00 (this offset address is relative to the master ADC base address +
0x300)
Reset value: 0x0000 0000
This register provides an image of the status bits of the different ADCs. Nevertheless it is
read-only and does not allow to clear the different status bits. Instead each status bit must
be cleared by writing 0 to it in the corresponding ADCx_SR register.
31 30 29 28 27
Res. Res. Res. Res. Res.
15 14 13 12 11
Res. Res. Res. Res. Res.
Bits 31:27 Reserved, must be kept at reset value.
Bit 26 JQOVF_SLV: Injected Context Queue Overflow flag of the slave ADC
This bit is a copy of the JQOVF bit in the corresponding ADCx_ISR register.
Bit 25 AWD3_SLV: Analog watchdog 3 flag of the slave ADC
This bit is a copy of the AWD3 bit in the corresponding ADCx_ISR register.
Bit 24 AWD2_SLV: Analog watchdog 2 flag of the slave ADC
This bit is a copy of the AWD2 bit in the corresponding ADCx_ISR register.
Bit 23 AWD1_SLV: Analog watchdog 1 flag of the slave ADC
This bit is a copy of the AWD1 bit in the corresponding ADCx_ISR register.
Bit 22 JEOS_SLV: End of injected sequence flag of the slave ADC
This bit is a copy of the JEOS bit in the corresponding ADCx_ISR register.
Bit 21 JEOC_SLV: End of injected conversion flag of the slave ADC
This bit is a copy of the JEOC bit in the corresponding ADCx_ISR register.
Bit 20 OVR_SLV: Overrun flag of the slave ADC
This bit is a copy of the OVR bit in the corresponding ADCx_ISR register.
Bit 19 EOS_SLV: End of regular sequence flag of the slave ADC
This bit is a copy of the EOS bit in the corresponding ADCx_ISR register.
Bit 18 EOC_SLV: End of regular conversion of the slave ADC
This bit is a copy of the EOC bit in the corresponding ADCx_ISR register.
26 25 24
JQOVF_ AWD3_ AWD2_
SLV SLV SLV
r r r
10 9 8
JQOVF_ AWD3_ AWD2_
MST MST MST
r r r
RM0366 Rev 5
Analog-to-digital converters (ADC)
23 22 21
AWD1_ JEOS_ JEOC_ OVR_
SLV SLV SLV
Slave ADC
r r r
7 6 5
AWD1_ JEOS_ JEOC_ OVR_
MST MST MST
Master ADC
r r r
20 19 18
EOS_ EOC_ EOSMP_
SLV SLV SLV
r r r
4 3 2
EOS_ EOC_ EOSMP_
MST MST MST
r r r
17 16
ADRDY_
SLV SLV
r r
1 0
ADRDY_
MST MST
r r
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