Fig. 2.3.5 Memory Map Of 2 Page Register (Only M37221M8-Xxxsp And M37221Ma-Xxxsp) - Renesas 7200 Series User Manual

2 Page Register Area (addresses 217
Address
217
ROM correction address 1 (high-order)
16
218
ROM correction address 1 (low-order)
16
219
ROM correction address 2 (high-order)
16
21A
16 ROM correction address 2 (low-order)
21B
ROM correction enable register (RCR)
16
Note: Only M37221M8-XXXSP and M37221MA-XXXSP have this area.

Fig. 2.3.5 Memory map of 2 page register (only M37221M8-XXXSP and M37221MA-XXXSP)

Bit allocation
<
Name
0
1
Register
b7
ADH17
ADL17
ADH27
ADL27
7220 Group User's Manual
FUNCTIONAL DESCRIPTION
to 21B )
16 16
>
:
Function bit
:
:
No function bit
: Fix this bit to "0"
(do not write "1")
: Fix this bit to "1"
(do not write "0")
Bit allocation
ADH16 ADH15 ADH14 ADH13 ADH12 ADH11
ADL16 ADL15 ADL14 ADL13 ADL12 ADL11
ADH26 ADH25 ADH24 ADH23 ADH22 ADH21
ADL26 ADL25 ADL24 ADL23 ADL22 ADL21
RCR1
0 0
2.3 Memory assignment
State immediately after reset
<
: "0" immediately after reset
0
: "1" immediately after reset
1
?
: Indeterminate immediately
after reset
State immediately after reset
b0 b7
ADH10 ?
?
ADL10
ADH20
?
?
ADL20
RCR0
00
16
>
b0
2-15