Bit Format - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
22.7.8

Bit format

Figure 22-64 IEBus bit format
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
The format of the bits constituting the communication frame of the IEBus is shown
below.
Logic "1"
Logic "0"
Preparation
period
Preparation period:
Synchronization period:
Data period:
Stop period:
The synchronization period and data period are almost equal to each other in length.
The IEBus synchronizes each bit. The specifications on the time of the entire bit and
the time related to the period allocated to that bit differ depending on the type of
transmit bit, or whether the unit is the master unit or a slave unit. The master and slave
units monitor whether each period (preparation period, synchronization period, data
period, and stop period) is output for the specified time while they are in
communication. If a period is not output for the specified time, the master and slave
units report a timing error, immediately terminate communication, and enter the
standby status.
Synchronization Data period
period
First low-level (logic "1") period
Next high-level (logic "0") period
Period indicating value of bit
Last low-level (logic "1") period
22. IEBus Controller
Stop period
22-128