Table 2.10 Branch Instructions - Renesas H8SX/1520 Series Hardware Manual

Instruction
BISTZ
BFLD
BFST

Table 2.10 Branch Instructions

Instruction
BRA/BS
BRA/BC
BSR/BS
BSR/BC
Bcc
BRA/S
JMP
BSR
JSR
RTS
RTS/L
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Size Function
∼ Z → (<bit-No.> of <EAd>)
B
Transfers the inverse of the zero flag value to a specified bit in the
contents of a memory location. The bit number is specified by 3-bit
immediate data.
(EAs) (bit field) → Rd
B
Transfers a specified bit field in memory location contents to the lower bits
of a specified general register.
Rs → (EAd) (bit field)
B
Transfers the lower bits of a specified general register to a specified bit
field in memory location contents.
Size Function
B Tests a specified bit in memory location contents. If the specified
condition is satisfied, execution branches to a specified address.
B Tests a specified bit in memory location contents. If the specified
condition is satisfied, execution branches to a subroutine at a specified
address.

Branches to a specified address if the specified condition is satisfied.

Branches unconditionally to a specified address after executing the next
instruction. The next instruction should be a 1-word instruction except for
the block transfer and branch instructions.

Branches unconditionally to a specified address.

Branches to a subroutine at a specified address.

Branches to a subroutine at a specified address.

Returns from a subroutine.

Returns from a subroutine, restoring data from the stack to multiple
general registers.
Rev. 3.00 Mar. 14, 2006 Page 51 of 804
REJ09B0104-0300
Section 2 CPU