Data Transfer Instructions; Table 2.4 Data Transfer Instructions - Renesas H8/3847R Series Hardware Manual

8-bit single-chip microcomputer super low power
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2.5.1

Data Transfer Instructions

Table 2.4 describes the data transfer instructions. Figure 2.5 shows their object code formats.
Table 2.4
Data Transfer Instructions
Size *
Instruction
MOV
B/W
POP
W
PUSH
W
Note:
* Size: Operand size
B:
Byte
W:
Word
Certain precautions are required in data access. See section 2.9.1, Notes on Data Access, for
details.
Function
(EAs) → Rd, Rs → (EAd)
Moves data between two general registers or between a general
register and memory, or moves immediate data to a general
register.
The Rn, @Rn, @(d:16, Rn), @aa:16, #xx:16, @–Rn, and @Rn+
addressing modes are available for word data. The @aa:8
addressing mode is available for byte data only.
The @–R7 and @R7+ modes require word operands. Do not
specify byte size for these two modes.
@SP+ → Rn
Pops a 16-bit general register from the stack. Equivalent to
MOV.W @SP+, Rn.
Rn → @–SP
Pushes a 16-bit general register onto the stack. Equivalent to
MOV.W Rn, @–SP.
Rev. 6.00 Aug 04, 2006 page 55 of 680
Section 2 CPU
REJ09B0145-0600

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