Table of Contents
Advertisement
2. CPU
2.5.1
Data Transfer Instructions
Table 2.4 describes the data transfer instructions. Figure 2.5 shows their object code formats.
Table 2.4
Data Transfer Instructions
Instruction
Size*
MOV
B/W
POP
W
PUSH
W
Note:
Size: Operand size
*
B:
Byte
W:
Word
Certain precautions are required in data access. See section 2.9.1, Notes on Data Access, for
details.
Rev.3.00 Jul. 19, 2007 page 42 of 532
REJ09B0397-0300
Function
(EAs) → Rd, Rs → (EAd)
Moves data between two general registers or between a general
register and memory, or moves immediate data to a general register.
The Rn, @Rn, @(d:16, Rn), @aa:16, #xx:16, @–Rn, and @Rn+
addressing modes are available for byte or word data. The @aa:8
addressing mode is available for byte data only.
The @–R7 and @R7+ modes require word operands. Do not specify
byte size for these two modes.
@SP+ → Rn
Pops a 16-bit general register from the stack. Equivalent to MOV.W
@SP+, Rn.
Rn → @–SP
Pushes a 16-bit general register onto the stack. Equivalent to MOV.W
Rn, @–SP.
Advertisement
Table of Contents
