Fig. 6.7.28 Interrupt Request Register 1; Fig. 6.7.29 Interrupt Request Register 2; Fig. 6.7.30 Interrupt Control Register 1; Fig. 6.7.31 Interrupt Control Register 2 - Renesas 7200 Series User Manual

SFR Area (addresses E0
Address
E0
E1
E2
E3
E4
E5
E6
E7
E8
E9
EA
EB
EC
ED
EE
EF
F0
F1
F2
F3
F4
F5
F6
F7
F8
F9
FA
FB
FC
FD
FE
FF
Fig. 2.15.3 Internal state immediately after reset (2)
Register
Horizontal position register (HR)
16
Vertical position register 1 (CV1)
16
Vertical position register 2 (CV2)
16
16
Character size register (CS)
16
Border selection register (MD)
16
Color register 0 (CO0)
16
Color register 1 (CO1)
16
Color register 2 (CO2)
16
Color register 3 (CO3)
16
CRT control register (CC)
16
16
CRT port control register (CRTP)
16
CRT clock selection register (CK)
16
A-D control register 1 (AD1)
16
A-D control register 2 (AD2)
16
Timer 1 (TM1)
16
Timer 2 (TM2)
16
Timer 3 (TM3)
16
Timer 4 (TM4)
16
Timer 12 mode register (T12M)
16
Timer 34 mode register (T34M)
16
PWM5 register (PWM5)
16
16
16
Interrupt input polarity register (RE)
16
16
CPU mode register (CPUM)
16
Interrupt request register 1 (IREQ1)
16
Interrupt request register 2 (IREQ2)
16
Interrupt control register 1 (ICON1)
16
Interrupt control register 2 (ICON2)
16
7220 Group User's Manual
FUNCTIONAL DESCRIPTION
to FF )
16 16
State immediately after reset
<
: "0" immediately after reset
0
: "1" immediately after reset
1
: Indeterminate immediately
?
after reset
State immediately after reset
b7
0
?
0
?
0 0
0 0
0 0
0 0
? ?
>
b0
00
16
? ? ? ? ? ?
? ? ? ? ? ?
?
0 0
? ? ? ?
0 0 0 0
? ?
00
16
00
16
00
16
00
16
00
16
?
00
16
00
16
0 0 0 0 0
?
00
16
FF FF
16 16
07 07
16 16
FF FF
16 16
07 07
16 16
00
16
00
16
?
?
?
0 0 0 0 0 ?
00
16
1 1 1 1 0 0
00
16
00
16
00
16
00
16
2.15 Reset
2-97