Agilent Technologies 35670A Manual page 564

STATus
STATus:PRESet
Sets bits in most enable and transition registers to their default state.
Command Syntax:
Example Statements:
Attribute Summary:
Description:
STAT:PRES has the following effect on the Limit Fail and Questionable Voltage register sets:
Sets all enable register bits to 1.
Sets all positive transition register bits to 1.
Sets all negative transition register bits to 0.
STATUS:PRESet has the effect of bringing all events to the second level register sets (the Device State,
Questionable Status, and Operation Status) without creating an SRQ or reflecting events in a serial poll.
It also affects these register sets, (the Device State, Questionable Status, and Operation Status) as follows:
Sets all enable register bits to 0.
Sets all positive transition register bits to 1.
Sets all negative transition register bits to 0.
STAT:PRES sets all bits in the User Defined enable register to 0. It does not affect any other register.
20-12
STATus:PRESet
OUTPUT 711;":STATUS:PRES"
OUTPUT 711;"stat:preset"
Option: not applicable
Synchronization Required:
Preset State: not applicable
SCPI Compliance:
no
confirmed
command