Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1736

Initialization
Downstream Device Enumeration by Root Complex
Before issuing any request to the device across the PCIe link, the application software must initialize the iATU regis-
ter to correctly translate the SCB read or write transactions into PCIe TLPs. All PCIe configuration registers may be
accessed by an SOC fabric master over the DBI SCB.
When the PHY link is up and running the PCIE_APP_STAT.LNKUP bit is set.
The PCIe software:
• Scans the PCIe fabric to discover its topology and learn how the fabric is populated
• Programs the base and limit registers of switch ports to reflect the BAR range of the devices enumerated down-
stream
• Programs the BARs of endpoints
Host Software Writes to Bus Master Enable (BME), Memory Space Enable (MSE), and I/O
Space Enable (ISE) Bits in PCI-Compatible Command Register
End Point
The EP application logic must not generate any MEM or I/O requests until the host software has set the
PCIE_EP_STATCMD_[n].BME bit in the PCI-compatible command register. This bit is not checked before
transmitting requests. Therefore the application software must monitor the status of the
PCIE_EP_STATCMD_[n].BME bit by reading the register over the DBI SCB interface.
Root Complex
The RC application logic must not generate any MEM or I/O requests until the host has enabled the Memory Space
Enable bit (PCIE_RC_STATCMD_[n].MSE) and the I/O Space Enable bits
(PCIE_RC_STATCMD_[n].IOE) in the PCI-compatible command register. The RC port core does not check
these bits before transmitting requests. Therefore the application can monitor the status of these bits by reading the
register over the DBI SCB.
Configuration for Memory Read and Write Transactions
The following sections provides procedures for configuring memory reads and writes.
Do not configure the IATU when inbound or outbound transactions are in progress. The Inbound Trans-
NOTE:
actions and Outbound Transactions figures show the respective data transfers.
29–32 ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference