Frequency Characteristics; Limitations Of Sfr Operations - Renesas M16C R8C UART Debugger User Manual

5.4. Frequency Characteristics

The monitor program only operates at 38600bps.
The monitor program operates in developer tool-dedicated high-speed on-chip oscillator.
However, note that operation may not be possible when dividing the main clock and using it
with less than 1 MHz even in the range of the above frequency. Do not use the low-speed
on-chip oscillator clock as the system clock.
Note: Communication may not be possible depending on temperature and voltage.

5.5. Limitations of SFR Operations

Table 3 lists the limitations of register operations. Changing registers that are disabled will
cause the monitor program to malfunction.
Register
ISP (Interrupt Stack Pointer)
Flag Register
Processor Mode Register 0
Hardware Reset Protect Register
High-Speed/Low-Speed On-Chip
Oscillator Control Register (OCOCR)
System Clock f Control Register
(SCKCR)
System Clock f Select Register
(PHISEL)
Clock Stop Control Register
(CKSTPR)
High-Speed On-Chip Oscillator
Control Register 1
High-Speed On-Chip Oscillator
Control Register 2
Oscillation Stop Detection Register
(BAKCR)
Protect Register
Port PA Direction Register (PDA)
Port PA Register (PA)
Port PA Mode Control Register
(PAMCR
Port 1 Function Mapping Register
1 (PMH1)
UART 0 Transmit/Receive Mode
Register
UART 0 Bit Rate Register
UART 0 Transmit/Receive Control
Register 0
UART 0 Transmit/Receive Control
Register 1
UART 0 Function Selection
Register
UART 0 Transmit Buffer Register
UART 0 Receive Buffer Register
Table 3 Limitations on SFR Operations
Default Value
Reset t o 057Fh
N/A
Reset to 00h
Reset to 00h
Reset to 01h
Reset to 40h
Reset to 03h
Reset to 80h
N/A
Reset to 00h
N/A
N/A
N/A
25
Limitation
Set an area not used by the monitor
program.
Writing to the D flag is ignored.
Do not set the D flag to 1.
Single-chip mode only
Do not change this register.
Do not change this register.
Please set the CPU clock to 1 MHz
or less.
Please set the CPU clock to 1 MHz
or less.
Do not change this register.
Do not change this register.
N/A
N/A
Do not change this register.
Do not change this register.
Do not write data to this register.
Do not read this register.
Change
Partially
enabled
Partially
enabled
Partially
enabled
Disabled
Disabled
Partially
enabled
Partially
enabled
Disabled
Disabled
Enabled
Enabled
Disabled
Disabled