Figure 17.22 Bit-Rate-Adjustment Sequence - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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Section 17 Flash Memory (0.18-(m F-ZTAT Version)
(1)
Bit-Rate-Adjustment State
The bit rate is calculated by measuring the period of transfer of a low-level byte (H'00) from the
host. The bit rate can be changed by the command for a new bit rate selection. After the bit rate
has been adjusted, the boot program enters the inquiry and selection state. The bit-rate-adjustment
sequence is shown in figure 17.22.
Host
(2)
Communications Protocol
After adjustment of the bit rate, the protocol for serial communications between the host and the
boot program is as shown below.
1. One-byte commands and one-byte responses
These one-byte commands and one-byte responses consist of the inquiries and the ACK for
successful completion.
2. n-byte commands or n-byte responses
These commands and responses are comprised of n bytes of data. These are selections and
responses to inquiries.
The program data size is not included under this heading because it is determined in another
command.
3. Error response
The error response is a response to inquiries. It consists of an error response and an error code
and comes two bytes.
4. Programming of 128 bytes
The size is not specified in commands. The size of n is indicated in response to the
programming unit inquiry.
Rev. 3.00 Mar. 14, 2006 Page 632 of 804
REJ09B0104-0300
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H'00 (30 times maximum)
H'00 (completion of adjustment)
H'55
H'E6 (boot response)
(H'FF (error))

Figure 17.22 Bit-Rate-Adjustment Sequence

Boot program
Measuring the
1-bit length

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