Reset Circuit Example; Host Cpu Specifications - Renesas R-IN32M3 User Manual

R-IN32M3 Module

Reset Circuit Example

5.2.3
The example reset circuit in the figure shows a common 3.3-V supervisor. The main usage
is to ensure a defined delay until reset de-assertion after the 3.3-V power is switched on.
Host CPU
C=0.1uF
5.2.4

Host CPU Specifications

The recommended specifications of the host CPU are as follows.
ROM capacity: More than 512 KB
RAM capacity: More than 128 KB
SPI packet transfer size: 128 bytes (8 bits x 128 times) bulk data transfer
Note: When using a Renesas CPU, select the Simple SPI (SCI), as the maximum batch
data transfer amount of RSPI is 32 bytes.
R19UH0111ED0100 Rev.1.00
June 30, 2020
3.3V S-1003CA29I-M5T1U
VDD
MR
VSS
Figure 5.2 Reset Circuit Example
OUT
CD
C=6200pF
GND
5.
/RESET
R-IN32M3
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