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S3C6400X RISC MICROPROCESSOR
HS_SDCLK
HS_SDCMD (out)
HS_SDCMD (in)
HS_SDDATA[7:0] (out)
HS_SDDATA[7:0] (in)
Table 41-18. High Speed SDMMC Interface Transmit/Receive Timing Constants
(VDDINT= 1.0V± 0.05V, TA = -40 to 85°C, VDDMMC = 3.3V ± 0.3V, 2.5V ± 0.25V, 1.8V ± 0.15V)
Parameter
SD Command output Delay time
SD Command input Setup time
SD Command input Hold time
SD Data output Delay time
SD Data input Setup time
SD Data input Hold time
Note (1), (2) : This values shows when the Feedback Clock selections are disabled. If the Feedback Clock
selection enabled, setup time reduced to 3ns.
tHSDCS
tHSDDS
Figure 41-21. High Speed SDMMC Interface Timing
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
tHSDCD
tHSDCH
tHSDDD
tHSDDH
Symbol
Min
tSDCD
1.0
(1)
tSDCS
14.0
tSDCH
-
tSDDD
1.0
(2)
tSDDS
14.0
tSDDH
-
ELECTRICAL DATA
Typ.
Max
–
8.0
–
–
–
0.1
–
8.4
–
–
–
0.1
Unit
ns
ns
ns
ns
ns
ns
41-33
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