Device/Host Timer Registers - Freescale Semiconductor MCF54455 Reference Manual

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10.3.2

Device/Host Timer Registers

The host/device controller drivers can measure time-related activities using these timer registers, which
are not defined by the EHCI specification.
10.3.2.1
General Purpose Timer n Load Registers (GPTIMERnLD)
The GPTIMERnLD registers contain the timer duration or load value.
Address: 0xFC0B_0080 (GPTIMER0LD)
0xFC0B_0088 (GPTIMER1LD)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 10-9. General Purpose Timer n Load Registers (GPTIMERnLD)
Field
31–24
Reserved, must be cleared.
23–0
Specifies the value to be loaded into the countdown timer on a reset. The value in this register represents the
GPTLD
time in microseconds minus 1 for the timer duration. For example, for a one millisecond timer,
load 1000 – 1 = 999 (0x00_03E7).
Note: Maximum value of 0xFF_FFFF or 16.777215 seconds.
10.3.2.2
General Purpose Timer n Control Registers (GPTIMERnCTL)
The GPTIMERnCTL registers control the various functions of the general purpose timers.
Address: 0xFC0B_0084 (GPTIMER0CTL)
0xFC0B_008C (GPTIMER1CTL)
31
30
29 28 27 26 25
R
0
0 0 0 0 0
RUN
W
RST
Reset
0
0
0 0 0 0 0
Figure 10-10. General Purpose Timer n Control Registers (GPTIMERnCTL)
Field
31
Timer run. Enables the general purpose timer. Setting or clearing this bit does not have an effect on the
RUN
GPTCNT field.
0 Timer stop
1 Timer run
30
Timer reset. Setting this bit reloads GPTCNT with the value in GPTIMERnLD[GPTLD].
RST
0 No action
1 Load counter value
Freescale Semiconductor
Table 10-11. GPTIMERnLD Field Descriptions
24
23 22 21 20 19 18 17 16 15 14 13 12 11 10
MODE
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 10-12. GPTIMERnCTL Field Descriptions
Universal Serial Bus Interface – On-The-Go Module
9
GPTLD
Description
GPTCNT
Description
Access: User read/write
8
7
6
5
4
3
2
1
0
Access: User read/write
9
8
7
6
5
4
3
2
10-13
1
0

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