Each master is assigned depending on its connection to the various crossbar switch master ports.
The MPROTn field is defined as shown below.
Field
3
Reserved, must be cleared.
2
Master trusted for read. Determines whether the master is trusted for read accesses.
MTR
0 This master is not trusted for read accesses.
1 This master is trusted for read accesses.
1
Master trusted for writes. Determines whether the master is trusted for write accesses.
MTW
0 This master is not trusted for write accesses.
1 This master is trusted for write accesses.
0
Master privilege level. Determines how the privilege level of the master is determined.
MPL
0 Accesses from this master are forced to user-mode.
1 Accesses from this master are not forced to user-mode.
Freescale Semiconductor
Table 14-2. MPROTn Assignments
Crossbar Switch
MPROTn
Port Number
M0
MPROT0
M1
MPROT1
M2
MPROT2
M3
MPROT3
M5
MPROT5
M6
MPROT6
M7
MPROT7
1
This field is located at MPR[3:0]. However, it is hardwired to
0111 and may not be altered.
3
R
0
MTR
W
Figure 14-2. MPROTn Fields
Table 14-3. MPROTn Field Descriptions
Master
ColdFire Core
eDMA Controller
FEC0
FEC1
PCI Controller
USB On-the-Go
1
Serial Boot
2
1
0
MTW
MPL
Description
System Control Module (SCM)
14-3