Freescale Semiconductor MCF54455 Reference Manual page 276

Table 10-57. Isochronous Endpoint Bus Response Matrix (continued)
Token
Type
Ping
Invalid
1
Zero length packet
2
Force bit stuff error
10.5.3.5 Managing Queue Heads
The device queue head (dQH) points to the linked list of transfer tasks, each depicted by the device transfer
descriptor (dTD). An area of memory pointed to by EPLISTADDR contains a group of all dQH's in a
sequential list (Figure 10-44). The even elements in the list of dQH's receive endpoints (OUT/SETUP) and
the odd elements transmit endpoints (IN/INTERRUPT). Device transfer descriptors are linked head to tail
starting at the queue head and ending at a terminate bit. After the dTD retires, it is no longer part of the
linked list from the queue head. Therefore, software is required to track all transfer descriptors because
pointers no longer exist within the queue head after the dTD is retired (see
Link Pointers").
ENDPOINTLISTADDR
In addition to current and next pointers and the dTD overlay examined in
Transfers," the dQH also contains the following parameters for the associated endpoint: multipler,
maximum packet length, and interrupt on setup. The next section includes demonstration of complete
initialization of the dQH including these fields.
Freescale Semiconductor
Not
Stall
Primed
Ignore Ignore
Out
Ignore Ignore
Ignore Ignore
Endpoint Queue Heads
(up to 32 elements)
Endpoint QH0 - Out
Endpoint QH0 - In
Endpoint QH1 - Out
Figure 10-44. Endpoint Queue Head Diagram
Universal Serial Bus Interface – On-The-Go Module
Primed Underflow Overflow
Receive N/A Drop
Packet
Ignore Ignore Ignore
Ignore Ignore Ignore
Section 10.5.3.6.1, "Software
Transfer Buffer
Pointer
Transfer Buffer
Pointer
Endpoint
Transfer
Descriptors
Section 10.5.3.4, "Packet
Transfer
Buffer
Transfer
Buffer
Transfer
Buffer
Transfer
Buffer
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