Introduction - Freescale Semiconductor MCF54455 Reference Manual

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Chapter 34
Debug Module
34.1

Introduction

This chapter describes the revision D+ enhanced hardware debug module.
34.1.1
Block Diagram
The debug module is shown in
Control
BKPT
34.1.2
Overview
Debug support is divided into three areas:
Real-time trace support—The ability to determine the dynamic execution path through an
application is fundamental for debugging. The ColdFire solution implements an 8-bit parallel
output bus that reports processor execution status and data to an external emulator system. See
Section 34.4.4, "Real-Time Trace
Background debug mode (BDM)—Provides low-level debugging in the ColdFire processor
complex. In BDM, the processor complex is halted and a variety of commands can be sent to the
processor to access memory, registers, and peripherals. The external emulator uses a three-pin,
serial, full-duplex channel. See
Section 34.3, "Memory Map/Register Definition".
Real-time debug support—BDM requires the processor to be halted, which many real-time
embedded applications cannot do. Debug interrupts let real-time systems execute a unique service
routine that can quickly save the contents of key registers and variables and return the system to
normal operation. External development systems can access saved data, because the hardware
supports concurrent operation of the processor and BDM-initiated commands. In addition, the
option allows interrupts to occur. See
Freescale Semiconductor
Figure
34-1.
ColdFire CPU Core
Debug Module
Trace Port
PSTDDATA[7:0]
Communication Port
PSTCLK
DSCLK, DSI, DSO
Figure 34-1. Processor/Debug Module Interface
Support".
Section 34.4.1, "Background Debug Mode (BDM),"
Section 34.4.2, "Real-Time Debug Support".
High-speed
local bus
and
34-2

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