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8.1.1
Block Diagram
Figure 8-2
shows the clock module block diagram.
XTAL32K
To Real-Time
OSC
EXTAL32K
Crystal
Ref. Mode
XTAL
OSC
EXTAL
External
Ref. Mode
Bus
Interface
Reset Config
Signals
8.1.2
Features
Features of the clock module include:
•
16–66.66 MHz input clock frequency
•
Programmable frequency multiplication factor settings generating voltage-controlled oscillator
(VCO) frequencies from 300 – 540 MHz, resulting in a core frequency of 75 MHz (f
266.67 MHz (maximum rated frequency).
•
Five user-programmable output dividers
— Each post-VCO divider can be programmed to divide-by-2 through divide-by-16. (There are
some dependencies of the divider settings. See
for details.) The post-VCO dividers can be enabled asynchronously or disabled via register.
— Allows glitch-free, dynamic switching of the output divider
•
Provides signals indicating when the PLL has acquired lock and lost lock
•
16 – 40 MHz reference crystal oscillator
•
Support for low-power modes
•
Direct clocking of system by input clock, bypassing the PLL
•
Loss-of-lock reset
•
Reference crystal oscillator for the real time clock (RTC) module. Input clock used is
programmable within the RTC.
Freescale Semiconductor
Clock
Phase/Frequency
Detector (PFD)
Feedback Divider
Lock
Detect
Registers
Figure 8-2. Clock Module Diagram
Loop Filter
(P)
PLL
Section 8.2.1, "PLL Control Register
Clock Module
Voltage-Controlled
Oscillator (VCO)
VCO Clock
Frequency
Output Dividers
(2 to 16)
Output Clocks
4) to
vco
(PCR)",
8-3
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