Features - Freescale Semiconductor MCF54455 Reference Manual

Serial Boot Facility (SBF)
12.1.2

Features

The SBF includes these distinctive features:
• Support for many different SPI memory devices
— EEPROM
— Flash
— FRAM
— Embedded FPGA memory
• External interface maps directly to (and can be multiplexed with) the DMA serial peripheral
interface (DSPI) pins
• Self-adjusting shift clock frequency for maximum throughput supported by SPI memory
• Optionally load boot code into processor's memory space
12.2 External Signal Description
Listed below are the SBF module external signals.
Signal I/O
SBF_CK O Shift clock. Alternate edges of this signal cause the SPI memory to accept
SBF_CS O Chip select. This signal enables the SPI memory and places it into an
SBF_DI I
SBF_DO O Data out. The SBF drives the read command and address on this signal.
1
Disabled by the SBF when the SPI memory begins shifting out data.
12.3 Memory Map/Register Definition
The SBF programming model consists of the registers listed below.
Address
0xFC0A_0018 Serial boot facility status register (SBFSR)
0xFC0A_0020 Serial boot facility control register (SBFCR)
12-2
Table 12-1. Signal Properties
data from and drive data to the processor
active state, ready to accept commands.
Data in. The SPI memory drives and the processor accepts read data on
this signal.
Table 12-2. SBF Memory Map
Register
Description
Width
(bits)
16
16
Reset Pull Up
— —
— —
1
— Active
— —
Access Reset Value Section/Page
R See Section 12.3.1/12-3
R/W See Section 12.3.2/12-3
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