Freescale Semiconductor MCF54455 Reference Manual page 99

ColdFire Core
Table 3-17. Miscellaneous Instruction Execution Times (continued)
Opcode <EA>
MVZ <ea>,Dx 1(0/0)
NOP 6(0/0)
PEA <ea>
PULSE 1(0/0)
STOP #imm
TRAP #imm
TPF 1(0/0)
TPF.W 1(0/0)
TPF.L 1(0/0)
UNLK Ax 1(1/0)
WDDATA <ea>
WDEBUG <ea>
1
The n is the number of registers moved by the MOVEM opcode.
2
If a MOVE.W #imm,SR instruction is executed and imm[13] equals 1, the execution time is 1(0/0).
3
The execution time for STOP is the time required until the processor begins sampling continuously for interrupts.
4
PEA execution times are the same for (d16,PC).
5
PEA execution times are the same for (d8,PC,Xn*SF).
3.3.5.6 EMAC Instruction Execution Times
Opcode
MAC.L Ry, Rx, Raccx
MAC.L Ry, Rx, <ea>, Rw, Raccx
MAC.W Ry, Rx, Raccx
MAC.W Ry, Rx, <ea>, Rw, Raccx
MOVE.L <ea>y, Raccx
MOVE.L Raccy, Raccx
MOVE.L <ea>y, MACSR
MOVE.L <ea>y, Rmask
MOVE.L <ea>y,Raccext01
MOVE.L <ea>y,Raccext23
MOVE.L Raccx, <ea>x
3-33
Rn (An) (An)+
1(1/0) 1(1/0)
— —
— 1(0/1) —
— —
— — —
— — —
— —
— —
— —
— —
— 1(1/0) 1(1/0)
— 3(2/0) —
Table 3-18. EMAC Instruction Execution Times
<EA>
Rn (An)
1(0/0) —
— 1(1/0)
1(0/0) —
— 1(1/0)
1(0/0) —
1(0/0) —
8(0/0) —
7(0/0) —
1(0/0) —
1(0/0) —
2
1(0/0) —
Effective Address
-(An) (d16,An) (d8,An,Xn*SF)
1(1/0) 1(1/0) 2(1/0)
— — —
4
— 1(0/1) 2(0/1)
— — —
— — —
— — —
— — —
— — —
— — —
— — —
1(1/0) 1(1/0) 2(1/0)
— 3(2/0) —
Effective Address
(d8,An,
(An)+ -(An) (d16,An)
Xn*SF)
— — —
1
1(1/0) 1(1/0) 1(1/0)
— — —
1
1(1/0) 1(1/0) 1(1/0)
— — —
— — —
— — —
— — —
— — —
— — —
— — —
xxx.wl #xxx
1(1/0) 1(0/0)
— —
5
1(0/1) —
— —
3
— 6(0/0)
— 18(1/2)
— —
— —
— —
— —
1(1/0) —
— —
xxx.wl #xxx
— — —
— — —
— — —
— — —
— — 1(0/0)
— — —
— — 8(0/0)
— — 7(0/0)
— — 1(0/0)
— — 1(0/0)
— — —
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