Freescale Semiconductor MCF54455 Reference Manual page 638

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Field
15–12
Reserved, must be cleared.
11
RMII Echo. Enables RMII echo mode. RMII 2-bit receive data is processed through the RMII receive logic to the
RMII_ECHO
FEC and also routes through the RMII's transmit logic to become RMII 2-bit transmit data out.
0 Normal operation.
1 RMII echo mode enabled.
Note: When RMII_ECHO is set, proper operation is guaranteed only when RMII_MODE = 1, RMII_LOOP = 0 and
LOOP = 0.
10
RMII loopback. Enables RMII loopback mode. Causes the MII transmit outputs from the Ethernet controller to loop
RMII_LOOP
back to the Ethernet controllers's MII receive inputs through the RMII transmit/receive logic.
0 Normal operation.
1 RMII loopback mode enabled.
Note: When RMII_LOOP is set, proper operation is guaranteed only when RMII_MODE = 1, RMII_ECHO = 0,
LOOP = 0, and TCRn[FDEN] = 1.
9
RMII 10-Base T. Enables 10Mbps mode of the RMII. Determines the clock frequency of the clock source to the
RMII_10T
FEC logic to support 10/100Mbps operations.
0 100 Mbps operation. The 50 MHz RMII reference clock on FEC_TXCLK is sent to the RMII, while a divided-by-2
version (25 MHz) is sent to the FEC.
1 10 Mbps operation. The 50 MHz RMII reference clock on FEC_TXCLK is divided by 10 (5 MHz) and sent to the
RMII, while a divided-by-20 version (2.5 MHz) is sent to the FEC.
8
RMII Mode. Indicates if the FEC is in RMII or MII/7-wire mode. This is a read-only bit that reflects the status of the
RMII_MODE
MII_MODE bit AND'd with the PAR_FEC register in the pin multiplexing and control module. See
"FEC Pin Assignment Register (PAR_FEC),"
For FEC0: RMII_MODE = RCR0[MII_MODE] && (PAR_FEC[2] && PAR_FEC[1])
For FEC1: RMII_MODE = RCR1[MII_MODE] && (PAR_FEC[6] && PAR_FEC[5])
0 FEC configured for MII or 7-wire mode as indicated by the MII_MODE bit.
1 FEC configured for RMII operation, only if the MII_MODE bit is set.
To summarize the various settings see the below table.
7–6
Reserved, must be cleared.
Freescale Semiconductor
Table 26-14. RCRn Field Descriptions (continued)
for more details.
PAR_FEC[2:0]
MII_MODE
PAR_FEC[6:5]
000
x
001
x
0
01x
1
10x
x
110
x
0
111
1
Fast Ethernet Controllers (FEC0 and FEC1)
Description
RMII_MODE
Description
(Equation
26-2)
0
GPIO mode
0
Non-FEC functions
0
7-wire mode
1
RMII mode
0
Reserved
0
Reserved
0
7-wire mode
0
MII mode
Section 16.3.5.1,
Eqn. 26-2
Eqn. 26-3
26-20

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