Freescale Semiconductor MCF54455 Reference Manual page 593

Advanced Technology Attachment (ATA)
Figure 23-17 shows timing for device terminating UDMA in transfer.
ATA_DA[2:0]
ATA_DMARQ
ATA_DMACK
ATA_DIOR
ATA_DIOW
ATA_IORDY
Read Data
Write Data
ATA_BUFFER_EN
Timing parameters for UDMA in burst appear in
ATA Spec
Parameter Parameter
tack tack
tenv tenv
tds tds1
tdh tdh1
tcyc tc1
trp trp
1
tx1
tmli tmli1
tzah tzah
tdzfs tdzfs
tcvh tcvh
ton
toff
1
There is a special timing requirement in the ATA host requiring the internal DIOW to only go high three clocks after the last
active edge on the DSTROBE signal. The equation on this line tries to capture this constraint.
2. Make ton and toff big enough to avoid bus contention.
23-18
t t
c1 c1
t t
ds dh
Figure 23-17. UDMA in Device Terminates Transfer
Table
Table 23-11. Timing Parameters for UDMA in Burst
tack(min) = (time_ack * T) - (tskew1 + tskew2)
tenv(min) = (time_env * T) - (tskew1 + tskew2)
tenv(max) = (time_env * T) + (tskew1 + tskew2)
tds - (tskew3) - ti_ds > 0
tdh - (tskew3) -ti_dh > 0
(tcyc - tskew + TBD) > T
trp(min) = time_rp * T - (tskew1 + tskew2 + tskew6)
(time_rp * T) - (tco + tsu + 3T + 2 *tbuf + 2*tcable2) > trfs (drive)
tmli1(min) = (time_mlix + 0.4) * T
tzah(min) = (time_zah + 0.4) * T
tdzfs = (time_dzfs * T) - (tskew1 + tskew2)
tcvh = (time_cvh *T) - (tskew1 + tskew2)
ton = time_on * T - tskew1
toff = time_off * T - tskew1
t
mli
t
t
ss1
li5
t
t
zah
dzfs
t
on
23-11.
Value
t
ack
t
cvh
t
off
How to Meet?
TIME_ACK
TIME_ENV
TSKEW3, TI_DS, TI_DH
should be low enough
T big enough
TIME_RP
TIME_RP
TIME_MLIX
TIME_ZAH
TIME_DZFS
TIME_CVH
Freescale Semiconductor