Freescale Semiconductor MCF54455 Reference Manual page 374

Field
2 DSPI_SIN pin assignment.
PAR_SIN 0 DSPI_SIN pin configured for GPIO
1 DSPI_SIN pin configured for DSPI serial data input function
1 DSPI_SOUT pin assignment.
PAR_SOUT 0 DSPI_SOUT pin configured for GPIO
1 DSPI_SOUT pin configured for DSPI serial data output function
0 DSPI_SCK pin assignment.
PAR_SCK 0 DSPI_SCK pin configured for GPIO
1 DSPI_SCK pin configured for DSPI serial clock function
16.3.5.5 Byte Enable Pin Assignment Register (PAR_BE)
The PAR_BE register controls the functions of the byte enable pins. After reset, the byte enable signals are
configured to their primary functions.
Address: 0xFC0A_4064 (PAR_BE)
7
R
PAR_BE3
W
Reset: 1
Figure 16-38. Byte Enable Pin Assignment Register (PAR_BE)
Field
7–6 FB_BE3 pin assignment.
PAR_BE3 00 FB_BE3 pin configured for GPIO
01 Reserved
10 FB_BE3 pin configured for FlexBus transfer size 1 function
11 FB_BE3 pin configured for FlexBus byte enable 3 function
5–4 FB_BE2 pin assignment.
PAR_BE2 00 FB_BE2 pin configured for GPIO
01 Reserved
10 FB_BE2 pin configured for FlexBus transfer size 0 function
11 FB_BE2 pin configured for FlexBus byte enable 2 function
3 Reserved, should be cleared.
2 FB_BE1 pin assignment.
PAR_BE1 0 FB_BE1 pin configured for GPIO
1 FB_BE1 pin configured for FlexBus byte enable 1 function
1 Reserved, should be cleared.
3–0 FB_BE0 pin assignment.
PAR_BE0 0 FB_BE0 pin configured for GPIO
1 FB_BE0 pin configured for FlexBus byte enable 0 function
Freescale Semiconductor
Table 16-12. PAR_DSPI Field Descriptions (continued)
6 5
PAR_BE2
1 1
Table 16-13. PAR_BE Field Descriptions
Description
4 3 2
PAR_BE1
1 0 1
Description
Pin Multiplexing and Control
Access: User read/write
1 0
PAR_BE0
0 1
16-29