Freescale Semiconductor MCF54455 Reference Manual page 219

Universal Serial Bus Interface – On-The-Go Module
10.3.1.5 Transmit Buffer Hardware Parameters Register (HWTXBUF)
Provides the transmit-buffer parameters for this implementation of the module.
Address: 0xFC0B_0010 (HWTXBUF)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R TXLC 0 0 0 0 0 0 0
W
Reset 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 0
Figure 10-7. Transmit Buffer Hardware Parameters Register (HWTXBUF)
Field
31 Transmit local context registers. Indicates how the device transmit context registers implement. Always set on
TXLC USB OTG module.
0 Store device transmit contexts in the TX FIFO
1 Store device transmit contexts in a register file
30–24 Reserved, always cleared.
23–16 Transmit channel address. Number of address bits required to address one channel's worth of TX data. Always
TXCHANADD 0x04.
15–8 Transmit address. Number of address bits for the entire TX buffer. Always 0x06.
TXADD
7–0 Transmit burst. Indicates number of data beats in a burst for transmit DMA data transfers. Always 0x04.
TXBURST
10.3.1.6 Receive Buffer Hardware Parameters Register (HWRXBUF)
Provides the receive buffer parameters for this implementation of the module.
Address: 0xFC0B_0014 (HWRXBUF)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0
Figure 10-8. Receive Buffer Hardware Parameters Register (HWRXBUF)
Field
31–16 Reserved.
15–8 Receive address. The number of address bits for the entire RX buffer. Always 0x04.
RXADD
7–0 Receive burst. Indicates the number of data beats in a burst for receive DMA data transfers. Always 0x04.
RXBURST
10-12
TXCHANADD
Table 10-9. HWTXBUF Field Descriptions
Description
Table 10-10. HWRXBUF Field Descriptions
Description
Access: User read-only
9 8 7 6 5
TXADD TXBURST
Access: User read-only
9 8 7 6 5
RXADD RXBURST
Freescale Semiconductor
4 3 2 1 0
0
4 3 2 1 0