Freescale Semiconductor MCF54455 Reference Manual page 369

Pin Multiplexing and Control
Address: 0xFC0A_404F (PCLRR_FECI2C)
0xFC0A_4056 (PCLRR_ATAH)
7
R 0
W
Reset: 0
Figure 16-28. Port x Clear Output Data Registers (PCLRR_x)
Address: 0xFC0A_404A (PCLRR_SSI)
7
R 0
W
Reset: 0
Figure 16-29. Port SSI Clear Output Data Registers (PCLRR_SSI)
Address: 0xFC0A_4046 (PCLRR_FBCTL)
0xFC0A_404C (PCLRR_BE)
0xFC0A_404E (PCLRR_DMA)
0xFC0A_4053 (PCLRR_TIMER)
7
R 0
W
Reset: 0
Figure 16-30. Port x Clear Output Data Registers (PCLRR_x)
Address: 0xFC0A_4057 (PCLRR_ATAL)
7
R 0
W
Reset: 0
Figure 16-31. Port ATAL Clear Output Data Registers (PCLRR_ATAL)
Address: 0xFC0A_404D (PCLRR_CS)
7
R 0
W
Reset: 0
Figure 16-32. Port CS Clear Output Data Registers (PCLRR_CS)
16-24
6 5 4
0 0 0
0 0 0
6 5 4
0 0 0
0 0 0
6 5 4
0 0 0
0 0 0
6 5 4
0 0
0 0 0
6 5 4
0 0 0
0 0 0
Access: User write-only
3 2 1
0 0 0
PCLRR_x
0 0 0
Access: User write-only
3 2 1
0 0 0
PCLRR_SSI
0 0 0
Access: User write-only
3 2 1
0 0 0
PCLRR_x
0 0 0
Access: User write-only
3 2 1
0 0 0
PCLRR_ATAL
0 0 0
Access: User write-only
3 2 1
0 0 0
PCLRR_CS
0 0 0
Freescale Semiconductor
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0