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Address
0xFC0A_80A4 PCI Target Base Address Translation Register 5
(PCITBATR5)
0xFC0A_80A8 PCI Interrupt Register (PCIINTR)
0xFC0A_80F8 PCI Configuration Address Register (PCICAR)
0xFC0A_C000 PCI Arbiter Control Register (PACR)
0xFC0A_C004 PCI Arbiter Status Register (PASR)
1
Alias of PCTBATR0 at location 0xFC0A_8090.
2
Alias of PCTBATR1 at location 0xFC0A_8094.
22.3.1
PCI Type 0 Configuration Registers
The PCI controller supplies a type 0 PCI configuration space header. These registers are accessible as an
offset within the device memory map or through externally mastered PCI configuration cycles. Only
external PCI configuration accesses can access PCI Dword reserved space (0x10 – 0x3F).
22.3.1.1
Device ID/Vendor ID Register (PCIIDR)—PCI Dword Addr 0
Address: 0xFC0A_8000 (PCIIDR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R
W
Reset 0
1
0
1
1
Field
31–16
This field is read-only and represents the PCI Device ID assigned to this processor. Its value is: 0x5807.
Device ID
15–0
This field is read-only and represents the PCI Vendor ID assigned to this processor. Its value is: 0x1957.
Vendor ID
Freescale Semiconductor
Table 22-2. PCI Controller Memory Map (continued)
Register
PCI Arbiter Registers
Device ID
0
0
0
0
0
0
0
0
Figure 22-2. PCIIDR Register
Table 22-3. PCIIDR Field Descriptions
Width Access Reset Value
32
R/W
32
R/W
32
R/W
32
R/W
32
R/W
1
1
1
0
0
0
1
1
Description
PCI Bus Controller
Section/Page
0x0000_0000
22.3.2.10/22-23
0x0000_0000
22.3.2.11/22-24
0x0000_0000
22.3.2.12/22-25
0x8000_0000
22.3.3.1/22-26
0x0000_0000
22.3.3.2/22-27
Access: User read-only
9
8
7
6
5
4
3
Vendor ID
0
0
1
0
1
0
1
0
2
1
0
1
1
1
22-7
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