Freescale Semiconductor MCF54455 Reference Manual page 356

Table 16-2. MCF5445x Signal Information and Muxing (continued)
Signal Name GPIO
VDD_RTC
VSS
VSS_OSC
1
Pull-ups are generally only enabled on pins with their primary function, except as noted.
2
Refers to pin's primary function.
3
Enabled only in oscillator bypass mode (internal crystal oscillator is disabled).
4
Serial boot must select 0-bit boot port size to enable the GPIO mode on these pins.
5
When the PCI is enabled, all PCI bus pins come up configured as such. This includes the PCI_GNT and PCI_REQ lines, which have
GPIO. The IRQ1/PCI_INTA signal is a special case. It comes up as PCI_INTA when booting as a PCI agent and as GPIO when booting
as a PCI host.
For the 360 TEPBGA, booting with PCI disabled results in all dedicated PCI pins being safe-stated. The PCI_GNT and PCI_REQ lines
and IRQ1/PCI_INTA come up as GPIO.
6
GPIO functionality is determined by the edge port module. The pin multiplexing and control module is only responsible for assigning
the alternate functions.
7
Depends on programmed polarity of the USB_VBUS_OC signal.
8
Pull-up when the serial boot facility (SBF) controls the pin
9
If JTAG_EN is asserted, these pins default to Alternate 1 (JTAG) functionality. The pin multiplexing and control module is not
responsible for assigning these pins.
Refer to the Chapter 2, "Signal Descriptions,"
not controlled by this module. The function of most of the pins (primary function, GPIO, etc.) is
determined by the pin assignment registers (PAR_x).
From the above table, there are several cases where a function is available on more than one pin. While it
is possible to enable the function on more than one pin simultaneously, this type of programming should
be avoided for input functions to prevent unexpected behavior. All multiple-pin functions are listed in
Table 16-3.
Freescale Semiconductor
Alternate 1
— —
— —
— —
Table 16-3. Multiple-Pin Functions
Function Direction
U1CTS I
U1RTS O
U1RXD I
U1TXD O
Alternate 2
— —
— —
— —
for more detailed descriptions of these pins and other pins
Associated Pins
U1CTS, SSI_BCLK
U1RTS, SSI_FS
U1RXD, SSI_RXD
U1TXD, SSI_TXD
Pin Multiplexing and Control
MCF54450
MCF54451
256 MAPBGA
360 TEPBGA
— — M12
— —
A1, A16, F6–11, A1, A22, B14, G7,
G6–11, H6–11, G9–10, G12–13,
J6–11, K6–11, T1,
T16 J9–14, K7, K9–14,
K16, L9–14, M7,
T9–11, T13, T15,
— — L15
MCF54452
MCF54453
MCF54454
MCF54455
C13
G15, H7, H16,
M9–M14, M16,
N9–14, P9–14,
P16, R7, T7,
AB1, AB22
C16
16-11