Table 16-2. MCF5445x Signal Information and Muxing (continued)
Signal Name
GPIO
SD_WE
—
IRQ7
PIRQ7
IRQ4
PIRQ4
IRQ3
PIRQ3
IRQ1
PIRQ1
FEC0_MDC
PFECI2C3
FEC0_MDIO
PFECI2C2
FEC0_COL
PFEC0H4
FEC0_CRS
PFEC0H0
FEC0_RXCLK
PFEC0H3
FEC0_RXDV
PFEC0H2
FEC0_RXD[3:2]
PFEC0L[3:2]
FEC0_RXD1
PFEC0L1
FEC0_RXD0
PFEC0H1
FEC0_RXER
PFEC0L0
FEC0_TXCLK
PFEC0H7
FEC0_TXD[3:2]
PFEC0L[7:6]
FEC0_TXD1
PFEC0L5
FEC0_TXD0
PFEC0H5
FEC0_TXEN
PFEC0H6
FEC0_TXER
PFEC0L4
FEC1_MDC
PFECI2C5
FEC1_MDIO
PFECI2C4
FEC1_COL
PFEC1H4
FEC1_CRS
PFEC1H0
Freescale Semiconductor
Alternate 1
Alternate 2
—
—
External Interrupts Port
—
—
—
SSI_CLKIN
—
—
PCI_INTA
—
FEC0
—
—
—
—
—
ULPI_DATA7
—
ULPI_DATA6
—
ULPI_DATA1
FEC0_RMII_
—
CRS_DV
—
ULPI_DATA[5:4]
FEC0_RMII_RXD1
—
FEC0_RMII_RXD0
—
FEC0_RMII_RXER
—
FEC0_RMII_
—
REF_CLK
—
ULPI_DATA[3:2]
FEC0_RMII_TXD1
—
FEC0_RMII_TXD0
—
FEC0_RMII_TXEN
—
—
ULPI_DATA0
FEC1
—
ATA_DIOR
—
ATA_DIOW
—
ATA_DATA7
—
ATA_DATA6
Pin Multiplexing and Control
MCF54450
MCF54451
256 MAPBGA
—
O
SDVDD
6
—
I
EVDD
—
I
EVDD
—
I
EVDD
—
I
EVDD
—
O
EVDD
—
I/O
EVDD
—
I
EVDD
—
I
EVDD
—
I
EVDD
—
I
EVDD
—
I
EVDD
G3, G4
—
I
EVDD
—
I
EVDD
—
I
EVDD
—
I
EVDD
—
O
EVDD
J1, J2
—
O
EVDD
—
O
EVDD
—
O
EVDD
—
O
EVDD
—
O
EVDD
—
I/O
EVDD
—
I
EVDD
—
I
EVDD
MCF54452
MCF54453
MCF54454
MCF54455
360 TEPBGA
R5
N20
L1
ABB13
L2
ABB13
L3
AB14
F15
C6
F3
AB8
F2
Y7
E1
AB7
F1
AA7
G1
AA8
G2
Y8
AB9, Y9
H1
W9
H2
AB10
H3
AA10
H4
Y10
W10, AB11
J3
AA11
J4
Y11
K1
W11
K2
AB12
—
W20
—
Y22
—
AB18
—
AA18
16-7