Freescale Semiconductor MCF54455 Reference Manual page 708

Synchronous Serial Interface (SSI)
Figure 27-30. Network Mode Timing - Continuous Clock
27.4.1.3 Gated Clock Mode
Gated clock mode often connects to SPI-type interfaces on microcontroller units (MCUs) or external
peripheral devices. In gated clock mode, presence of the clock indicates that valid data is on the SSI_TXD
or SSI_RXD signals. For this reason, no frame sync is needed in this mode. After transmission of data
completes, the clock is pulled to the inactive state. Gated clocks are allowed for the transmit and receive
Freescale Semiconductor 27-41