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Enhanced Multiply-Accumulate Unit (EMAC)
In
Figure
5-9, the OEP stalls the store-accumulator instruction for three cycles: the EMAC pipeline depth
minus 1. The minus 1 factor is needed because the OEP and EMAC pipelines overlap by a cycle, the EX
stage. As the store-accumulator instruction reaches the EX stage where the operation is performed, the
recently-updated accumulator 0 value is available.
As with change or use stalls between accumulators and general-purpose registers, introducing intervening
instructions that do not reference the busy register can reduce or eliminate sequence-related store-MAC
instruction stalls. A major benefit of the EMAC is the addition of three accumulators to minimize stalls
caused by exchanges between accumulator(s) and general-purpose registers.
5.3.4
Data Representation
MACSR[S/U,F/I] selects one of the following three modes, where each mode defines a unique operand
type:
1. Two's complement signed integer: In this format, an N-bit operand value lies in the range -2
(N-1)
< operand < 2
2. Unsigned integer: In this format, an N-bit operand value lies in the range 0 < operand < 2
binary point is right of the lsb.
3. Two's complement, signed fractional: In an N-bit number, the first bit is the sign bit. The remaining
bits signify the first N-1 bits after the binary point. Given an N-bit number, a
its value is given by the equation in
This format can represent numbers in the range -1 < operand < 1 - 2
For words and longwords, the largest negative number that can be represented is -1, whose internal
representation is 0x8000 and 0x8000_0000, respectively. The largest positive word is 0x7FFF or (1 - 2
the most positive longword is 0x7FFF_FFFF or (1 - 2
fractional numbers is [-1.0, ..., 1.0].
5.3.5
MAC Opcodes
MAC opcodes are described in the ColdFire Programmer's Reference Manual.
Remember the following:
•
Unless otherwise noted, the value of MACSR[N,Z] is based on the result of the final operation that
involves the product and the accumulator.
•
The overflow (V) flag is managed differently. It is set if the complete product cannot be represented
as a 40-bit value (this applies to 32 32 integer operations only) or if the combination of the
product with an accumulator cannot be represented in the given number of bits. The EMAC design
includes an additional product/accumulation overflow bit for each accumulator that are treated as
sticky indicators and are used to calculate the V bit on each MAC or MSAC instruction. See
Section 5.2.1, "MAC Status Register
5-15
- 1. The binary point is right of the lsb.
Equation
value
=
–
1 a
+
N 1
–
(MACSR)".
5-3.
N 2
–
–
i
+
1 N
–
2
ai
i
=
0
-(N-1)
.
-31
). Thus, the number range for these signed
(N-1)
N
- 1. The
a
a
... a
a
a
,
N-1
N-2
N-3
2
1
0
Eqn. 5-3
-15
);
Freescale Semiconductor
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