Functional Description - Freescale Semiconductor MCF54455 Reference Manual

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Enhanced Multiply-Accumulate Unit (EMAC)
BDM: 0x808 (ACCext23)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
R
ACC2U
W
Reset – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
Field
31–24
Accumulator 2 upper extension byte
ACC2U
23–16
Accumulator 2 lower extension byte
ACC2L
15–8
Accumulator 3 upper extension byte
ACC3U
7–0
Accumulator 3 lower extension byte
ACC3L
5.3

Functional Description

The MAC speeds execution of ColdFire integer-multiply instructions (MULS and MULU) and provides
additional functionality for multiply-accumulate operations. By executing MULS and MULU in the MAC,
execution times are minimized and deterministic compared to the 2-bit/cycle algorithm with early
termination that the OEP normally uses if no MAC hardware is present.
The added MAC instructions to the ColdFire ISA provide for the multiplication of two numbers, followed
by the addition or subtraction of the product to or from the value in an accumulator. Optionally, the product
may be shifted left or right by 1 bit before addition or subtraction. Hardware support for saturation
arithmetic can be enabled to minimize software overhead when dealing with potential overflow conditions.
Multiply-accumulate operations support 16- or 32-bit input operands in these formats:
Signed integers
Unsigned integers
Signed, fixed-point, fractional numbers
The EMAC is optimized for single-cycle, pipelined 32  32 multiplications. For word- and
longword-sized integer input operands, the low-order 40 bits of the product are formed and used with the
destination accumulator. For fractional operands, the entire 64-bit product is calculated and truncated or
rounded to the most-significant 40-bit result using the round-to-nearest (even) method before it is
combined with the destination accumulator.
For all operations, the resulting 40-bit product is extended to a 48-bit value (using sign-extension for
signed integer and fractional operands, zero-fill for unsigned integer operands) before being combined
with the 48-bit destination accumulator.
5-9
ACC2L
Figure 5-6. Accumulator Extension Register (ACCext23)
Table 5-7. ACCext23 Field Descriptions
8
ACC3U
Description
Access: User read/write
BDM read/write
7
6
5
4
3
2
1
0
ACC3L
Freescale Semiconductor

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