Enhanced Multiply-Accumulate Unit (Emac); Introduction; Overview - Freescale Semiconductor MCF54455 Reference Manual

Chapter 5

Enhanced Multiply-Accumulate Unit (EMAC)

5.1

Introduction

This chapter describes the functionality, microarchitecture, and performance of the enhanced
multiply-accumulate (EMAC) unit in the ColdFire family of processors.
5.1.1

Overview

The EMAC design provides a set of DSP operations that can improve the performance of embedded code
while supporting the integer multiply instructions of the baseline ColdFire architecture.
The MAC provides functionality in three related areas:
1. Signed and unsigned integer multiplication
2. Multiply-accumulate operations supporting signed and unsigned integer operands as well as
signed, fixed-point, and fractional operands
3. Miscellaneous register operations
The ColdFire family supports two MAC implementations with different performance levels and
capabilities. The original MAC features a three-stage execution pipeline optimized for 16-bit operands,
with a 16x16 multiply array and a single 32-bit accumulator. The EMAC features a four-stage pipeline
optimized for 32-bit operands, with a fully pipelined 32  32 multiply array and four 48-bit accumulators.
The first ColdFire MAC supported signed and unsigned integer operands and was optimized for 16x16
operations, such as those found in applications including servo control and image compression. As
ColdFire-based systems proliferated, the desire for more precision on input operands increased. The result
was an improved ColdFire MAC with user-programmable control to optionally enable use of fractional
input operands.
EMAC improvements target three primary areas:
Improved performance of 32  32 multiply operation.
•
• Addition of three more accumulators to minimize MAC pipeline stalls caused by exchanges
between the accumulator and the pipeline's general-purpose registers
• A 48-bit accumulation data path to allow a 40-bit product, plus 8 extension bits increase the
dynamic number range when implementing signal processing algorithms
The three areas of functionality are addressed in detail in following sections. The logic required to support
this functionality is contained in a MAC module
Freescale Semiconductor
(Figure 5-1).
5-2