Introduction - Freescale Semiconductor MCF54455 Reference Manual

Chapter 18
Edge Port Module (EPORT)
18.1

Introduction

The edge port module (EPORT) has up to eight interrupt pins, IRQ7 – IRQ0. Each pin can be configured
individually as a level-sensitive interrupt pin, an edge-detecting interrupt pin (rising edge, falling edge, or
both), or a general-purpose input/output (I/O) pin.
Not all EPORT signals may be output from the device. See
"Signal Descriptions,"
EPPAR[2n, 2n + 1]
EPFRn
EPPDRn
Synchronizer
EPIERn
EPDRn
EPDDRn
The GPIO module must be configured to enable the peripheral function of
the appropriate pins (refer to
prior to configuring the edge-port module.
Freescale Semiconductor
NOTE
to determine which signals are available.
Stop
Mode
Edge Detect
Logic
D0
Q
D1
Rising Edge
of System Clock
Figure 18-1. EPORT Block Diagram
NOTE
Chapter 16, "Pin Multiplexing and
Chapter 2,
D0
Q
D1
IRQn pin
Control")
To Interrupt
Controller
18-1