Freescale Semiconductor MCF54455 Reference Manual page 235

Universal Serial Bus Interface – On-The-Go Module
Field
31–5 Link pointer low (LPL). These bits correspond to memory address signal [31:5]. This field may only reference
ASYBASE a queue head (QH). Used only in host mode.
4–0 Reserved, must be cleared.
10.3.4.8 Endpoint List Address Register (EPLISTADDR)
This register is not defined in the EHCI specification. For device mode, this register contains the address
of the endpoint list top in system memory. The memory structure referenced by this physical memory
pointer assumes to be 64-bytes. The queue head is actually a 48-byte structure, but must be aligned on
64-byte boundary. However, the EPBASE field has a granularity of 2 Kbytes; in practice, the queue head
should be 2-Kbyte aligned.
The host and device mode functions share this register. In device mode, it is the EPLISTADDR register;
in host mode, it is the ASYNCLISTADDR register. See
Address Register (ASYNCLISTADDR),"
Address: 0xFC0B_0158 (EPLISTADDR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 10-24. Endpoint List Address Register (EPLISTADDR)
Field
31–11 Endpoint list address. Correspond to memory address signals [31:11] References a list of up to 32 queue heads
EPBASE (i.e. one queue head per endpoint and direction). Address of the top of the endpoint list.
10–0 Reserved, must be cleared.
10.3.4.9 Host TT Asynchronous Buffer Control (TTCTRL)
Address: 0xFC0B_015C (TTCTRL)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R 0 TTHA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 10-25. Host TT Asynchronous Buffer Control (TTCTRL)
10-28
Table 10-26. ASYNCLISTADDR Field Descriptions
for more information.
EPBASE
Table 10-27. EPLISTADDR Field Descriptions
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Description
Section 10.3.4.7, "Current Asynchronous List
9 8
0 0 0 0 0 0 0 0 0 0 0
Description
9 8
Access: User read/write
7 6 5 4 3 2 1 0
Access: User read/write
7 6 5 4 3 2 1
0 0
0 0
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