Freescale Semiconductor MCF54455 Reference Manual page 380

Field
15–11 Reserved, should be cleared.
10 ATA_BUFFER_EN pin assignment.
PAR_BUFEN 0 ATA_BUFFER_EN pin configured as GPIO.
1 ATA_BUFFER_EN pin configured for ATA buffer direction control function.
9 ATA_CS1 pin assignment.
PAR_ACS1 0 ATA_CS1 pin configured as GPIO.
1 ATA_CS1 pin configured for ATA chip select 1 function.
8 ATA_CS0 pin assignment.
PAR_ACS0 0 ATA_CS0 pin configured as GPIO.
1 ATA_CS0 pin configured for ATA chip select 0 function.
7 ATA_DA2 pin assignment.
PAR_DA2 0 ATA_DA2 pin configured as GPIO.
1 ATA_DA2 pin configured for ATA address 2 function.
6 ATA_DA1 pin assignment.
PAR_DA1 0 ATA_DA1 pin configured as GPIO.
1 ATA_DA1 pin configured for ATA address 1 function.
5 ATA_DA0 pin assignment.
PAR_DA0 0 ATA_DA0 pin configured as GPIO.
1 ATA_DA0 pin configured for ATA address 0 function.
4–3 Reserved, should be cleared.
2 ATA_RESET pin assignment.
PAR_ARESET 0 ATA_RESET pin configured as GPIO.
1 ATA_RESET pin configured for ATA reset function.
1 ATA_DMARQ pin assignment.
PAR_DMARQ 0 ATA_DMARQ pin configured as GPIO.
1 ATA_DMARQ pin configured for ATA DMA request function.
0 ATA_IORDY pin assignment.
PAR_IORDY 0 ATA_IORDY pin configured as GPIO.
1 ATA_IORDY pin configured for ATA wait function.
Freescale Semiconductor
Table 16-20. PAR_ATA Field Descriptions
Description
Pin Multiplexing and Control
16-35