Outbound Address Translation; Base Address Register Overview - Freescale Semiconductor MCF54455 Reference Manual

PCI Bus Controller
22.5.2.2

Outbound Address Translation

Figure 22-45 shows an example of internal bus initiator window configurations. Overlapping the inbound
memory window (local memory) and the outbound translation window is not supported and can cause
unpredictable behavior.
ColdFire Processor
Space
0
1G
Window 0
Internal Bus
Initiator
Window 2
Windows
Window 1
2G
3G
4G
Associated with PCI
Prefetchable Memory
Associated with PCI I/O
Associated with PCI
Non-Prefetchable Memory
22.5.2.3

Base Address Register Overview

Table 22-37 shows the available accessibility for all PCI associated base address and translation address
registers in the PCI controller.
22-56
Figure 22-45 does not show the configuration mechanism.
Window 0
Translation
Not Recommended
Window 1
Translation
Not Recommended
Window 2
Translation
Window 0 Base Address = 0x40
Window 0 Address Mask = 0x1F
Window 0 Translation Address = 0x00
Window 1 Base Address = 0x70
Window 1 Address Mask = 0x0F
Window 1 Translation Address = 0x70
Figure 22-45. Outbound Address Map
PCI Space PCI Space
(Memory View) (I/O View)
0 0
Window 0
1G 1G
PCI Controller
Memory
Window 1
2G 2G
PCI Controller
Memory
3G 3G
Window 2
4G 4G
Window 2 Base Address = 0x80
Window 2 Address Mask = 0x3F
Window 2 Translation Address = 0xC0
PCI Space
(Configuration
View)
0
1G
2G
3G
4G
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